igd9dxva32.dll

Company
Intel Corporation
Description

User Mode Driver for Intel R Graphics Technology

Version
25.20.100.6472
Architecture
32 bit
Threat Score
0 %
Original size
59168.1 Kb
Download size
19030.6 Kb
MD5
8d6eef7a3e90cf2117aadd18d49ec8d2
SHA1
88e632bd04445b4cbd525c862773a16c9aa896b9
SHA256
482fa92569e9ee606bc4bf4cb4a6283d25520346bb5e1e292d169329dc1d59af
@GTPin_Init@12
_MOS_GetMemNinjaCounter@0
_MOS_GetMemNinjaCounterGfx@0
_MOS_SetUltFlag@4
_OpenDxva@4

0: Disable SSD. 1: Enable SSD. 2+: If GT3 platform,

 SSD will be enabled

 else SSD will be disabled( Default).

@WiDiIREnable 

AV1 Decode Driver S2L Enable Flag

AV1 Decode driver S2L enable flag. 0: HUC FW S2L,

 1: Driver S2L.

CM based FC enable Control

Enable ACQP for HEVC VDEnc

Enable Aes Native

Enable CNL AVC Encode ARB WA

Enable Capture Mode for HEVC VDEnc

Enable CmdInitializer HuC FW for HEVC/VP9 VDEnc.

Enable Codec MMC

Enable Codec MMCD. (0: Disable codec MMCD

 other values: enable codec MMCD).

Enable Compute Context

Enable Compute Context. default:0 disabled.

Enable DDI sync to make sure DDI thread will not return

Enable Decode MMC

Enable Decode MMCD. (0: Disable decode MMCD

 other values: enable decode MMCD).

Enable Decode VE

Enable Decode VE CtxBasedScheduling

Enable Dump Recon Surface to AubCapture

Enable Encode MMC

Enable Encode MMCD. (0: Disable encode MMCD

 other values: enable encode MMCD).

Enable Encode VE

Enable Encode VE CtxBasedScheduling

Enable FE separate submission in Scalability decode. (Default 0: Disable FE separate submission 

Enable Frame Tracking

Enable HCP Scalability Decode

Enable HCP Scalability decode mode. (Default 1: Scalable Decode Mode 

Enable HEVC Encode Media Reset Test,

 by default:0(disabled).

Enable HEVC Per VDBOX HW Semaphore in GEN11

Enable HEVC Per VDBOX HW Semaphore in GEN11.

Enable HEVC Real Tile Multi Phase Decode

Enable HEVC SF 2 DMA Submits

Enable HEVC SFC Histogram StreamOut debug in Pre-Si. 0:Disable,

 1:Enable

Enable HEVC VDEnc SuperHME

Enable HEVC VDEnc UltraHME

Enable HEVC real tile multi-phase decode mode. Default is not enabled

Enable HW Semaphore

Enable HW Semaphore.

Enable LBC Only for IBC for HEVC VDEnc

Enable MDF Curbe Dump

Enable MDF ETW Log

Enable MDF Log Level

Enable MDF Surface Dump

Enable MDF Surface State Dump

Enable MDF UMD ULT

Enable MDF interface descriptor data dump

Enable Media RenderEngine MMC

Enable MediaReset Test

Enable PakObjCmd StreamOut for HEVC VDEnc

Enable Partial Frame Update for HEVC VDEnc

Enable RDOQ for HEVC

Enable RGB Encoding for HEVC VDEnc

Enable Rounding for HEVC VDEnc

Enable TileReplay for HEVC VDEnc

Enable UMD multiple thread. (Default 1: eanbe MT

 0: disable MT.)

Enable VC1 AP WA

Enable VDBox load balancing

Enable VE Debug Override

Enable VE Debug Override.

Enable VEBOX RGB Output

Enable VEBOX RGB Output for validation purpose

Enable VP MMC

Enable VP9 Vdenc Virtual Engine

Enable VP9 Vdenc Virtual Engine.

Enable Vebox Decompress

Enable Vebox Scalability

Enable WP Support

Enable Wave-front Parallel Processing in HostVLD parser. 

Enable Weighted Prediction support in HEVC Encoder.

Enable balancing of VDBox load by KMD hint. (Default FALSE: disabled

Enable decode status reporting

Enable long term reference in hevc vme brc. (Default 0: Disable

Enable media render engine memory compression in media workload

Enable memory compression

Enable power saving mode in HEVC Enc

Enable to set cmd default parameters from file (Default 0)

Error creating new file 

Error writing GEN binary into ISA file,

 bad offset from original file

Filter ID: %d,

 Unable to get Filter Setup

Flag 1: Disable deblocking kernel. 0: Default. Enable deblocking

For debugging purpose. Enable Vebox In-Place decompression

HEVC Encode Enable HW Stitch

HEVC Encode Enable HW Stitch.

If set,

 CodecHal will enable MediaSolo at the specified frame

MediaSolo Enable Frame Num

Need to enable MOS user feature key to get this value in report. .

Not Reported : Need to enable Report Encrypted Frame Count 

Perf Profiler Enable Control Flag

Pipe Start SemaphoreMemory

Set 1 to enable slice shutdown by force

Software Scoreboard enable Control

Surface %d: Unable to get resource information

Surface %d: Unable to write to surface

To Enable HW's AES decrypt ability to handle enrypted bitstream directly without trans-crypt

Unable to get CFB from plugin.

Unable to verify CFB

Used to enable BRC SW simulation Mode

Used to enable BRC SW simulation.

Used to enable ENCODE BRC SW simulation Custom Path

Used to enable HEVC ENCODE SubThread Number in the ENC kernel.

Used to enable HEVC VME ENCODE SSE.(default 0: disabled)

Used to enable HEVC VME ENCODE SSE.(default 0:disabled)

Used to enable or disable multiref QP feature for BRC.

VP 3P Dump Start Frame

VP9 Encode Enable HW Stitch

VP9 Encode Enable HW Stitch.

Last update: 21/01/2025